The present disclosure relates generally to the electrical, electronic and computer arts and, more particularly, to strain relaxed buffers suitable for growing channel regions of nFET and pFET devices and the fabrication of such buffers.
Various semiconductor devices benefit from the use of strain-relaxed buffer layers such as those comprising fully relaxed silicon germanium (SiGe). Strain-relaxed buffers (SRBs) can act as virtual substrates on which to grow semiconductor layers having lattice constants different from those of the original substrates, for example silicon (001). The SRBs can support strained or relaxed layers. The SRBs should be relaxed to help avoid the generation of crystal imperfections such as threading dislocations in the layer(s) grown thereon. Such defects are known to have deleterious effects on the properties of electronic and optoelectronic devices. The crystalline quality of a relaxed SiGe layer can be improved by, for example, growing compositionally graded buffer layers with a thickness of up to several micrometers. As the surface roughness of buffer layers obtained using such a technique may not be optimal, chemical mechanical polishing (CMP) may be necessary. Another technique used for fabricating a relaxed Si1-xGex buffer having reduced levels of threading dislocations includes epitaxially depositing a pseudomorphic or nearly pseudomorphic Si1-xGex layer on the surface of a silicon substrate, ion implanting atoms of a light element into the substrate, and annealing the substrate at a temperature above 650° C. Existing techniques for reducing threading dislocation (TD) density rely on plastic relaxation, which by definition works based on dislocation generation to relax the lattice mismatched crystals.
Exemplary devices that may be formed using strain-relaxed silicon germanium layers include fin-type field-effect transistors (FinFETs), metal oxide field effect transistors (MOSFETs), and strained silicon-based complementary metal oxide semiconductor (CMOS) devices. Some devices require silicon layers under tensile strain to enhance electron mobility. Other devices or elements thereof require semiconductor layers under compressive strain. The amount of strain on a silicon or silicon germanium layer grown epitaxially on a relaxed Si1-xGex layer can be engineered by providing an atomic percentage of germanium within a selected range.
Strain relaxed buffer layers allow dual channel materials to be provided on the same substrate employed to fabricate integrated circuits including, for example, FinFET devices. Defect density at the surface of the buffer layers is, however, a challenge to the successful fabrication of such devices. A defect density of about 105 cm−2 can be obtained using state-of-the-art processes as described above.